Hello, the place I work has been using the Cyclone V SOC for many years. When it first came out a few engineers wanted to know how fast can the ARM core toggle an external output pin. At this time they were still new to its architecture. They managed to write some code to have the ARM toggle an output pin. They had to go through the HPS bridge. They were surprised how slow it was and concluded that going from the HPS to the Logic side was very slow. But maybe they were not doing things correctly.
So, jump forward twelve years and I was having a conversation with a co-worker about how fast can data get into the processor and how fast can data get out. He said that a Nios cores could toggle an external pin faster than the ARM could having to go through the HPS bridge. I wanted to post this question and get comments.
Can you please share any comments.