Parallel highspeed ADC 9248 to DE-SoC board

[Isnan]

Hi everyone, 
I am doing a simple signal measurement using DEO Nano SoC kit interfacing with the terasic High-speed AD/DA card (AD9248) using NIOS processor. 

I believe that ADC pin interfacing is fine and the ADC chip is working, however, I face problems about data reading, they are not valid nor stable.,
I think this is because my configuration as follows, but I am not sure:
1. clock for ADC using pll 20Mhz
2. not adding on chip memory for buffer

here uart01.zip is my full code, any help will be appreciated
thank you

[JonWay_C_Intel]

Could you check with Terasic if they have any example design to get you started.

Mostly Terasic would be able to help to get you started. Example like below case:
https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Terasic-DE2-115-AD-DA-data-conversion-card/m-p/1230273#M18827

[Isnan]

hi @JonWay_C_Intel 

Thankyou for your reply.

yes, terasic have some projects about ADC, I learn a lot from their examples.
unfortunately, I only find AD9254 documentation for nios processor application, and the 9254 IP file cannot be modified to AD9248. 

from platform design, I set parallel data from ADC as PIO (parallel I/O, width 14 bit) and directly read in c using command "IORD (adc_base, 0)" without on-chip memory as buffer.
if anyone can confirm, do I have to use on-chip memory to store adc data capture before processed in nios? thank you

[JonWay_C_Intel]

Hi @Isnan Sorry for the delayed response. Did you find a solution? Have you tested with/without on-chip memory? I think you probably need the on-chip if you are not reading from the NIOS fast enough. Else, your ADC will be overwriting its data even before the NIOS is able to read it.

[Isnan]

Hi @JonWay_C_Intel 
Unfortunately, I don't find the solution yet. I change the ADC because of limited time. I am using serial ADC with spi interface for now. For first step, it is good enough but of course slower speed.  Thank you for the suggestion anyway. I will learn again about parallel ADC to FPGA because I have to use it for final project to catch the speed.