Pin Compatibility

[UMall1]

Is there any pin compatibility between the various FPGAs in the Stratix 10 SX and Agilex F series FPGA families. For example, as a design matures and needs more resources is there a clear replacement part available with more resources for a design?

[AqidAyman_Intel]

Do you mean you want a direct migration and compatibility from Stratix 10 SX to Agilex 7 F-Series?

[UMall1]

Yes. Stratix 10 SX and Agilex 7 F-series or Agilex 5 D-series?

[sstrell]

There used to be charts with up and down arrows that showed possible migration paths, but I haven't seen those for a while.  Probably the easiest way to get this info now would be in Quartus by attempting to add migration device(s) to a design (Assignments menu -> Device -> Migration Devices).  Unfortunately, this only shows part numbers, not device properties, so you'd have to go to the part number translator to understand what capabilities a supported migration device has.

Once you've added a migration device, pin assignments in the Pin Planner follow the placement rules for both the current device and any migration device(s) ensuring the placements are valid for both.

[AqidAyman_Intel · Accepted solution]

We do not have direct pin compatibility across different device families. However, we support direct migration for the same device family across different densities within the same package. You can refer to the link below:

https://www.intel.com/content/www/us/en/docs/programmable/683518/24-3/i-o-migration-support.html

This is the example guideline for the migration across Stratix 10 within the same package:

https://www.intel.com/content/www/us/en/docs/programmable/683163/current/software-design-migration.html

[AqidAyman_Intel]

Do you have any more questions on this?