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I am trying to program a stratix 10 L-tile dev kit using Quartus 18.1.
I can compile the project, when when I try to program the board, It gets to 13%, then fails.
Which seems to be the issue I'm having, but I'm not sure how to actually apply the assignments from the workaround.
Thanks for the assistance.
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As a first debugg step can you reduce the speed of the Jtag clock
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Hello,
I met the same problem with you, have you solved with it? Thank you!
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