FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5154 Discussions

Qsf file for emif ip arria 10 SoC development kit

srinivasan
Beginner
389 Views
Hi,
Can anyone share the qsf file(pin assignment) for DDR4 EMIF IP using arria 10 SoC development kit(x72 fpga pin).
0 Kudos
8 Replies
sstrell
Honored Contributor III
353 Views

Assuming this is the kit you're talking about, all the files you'll need are here including example designs for the EMIF:

https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/arria-...

srinivasan
Beginner
343 Views

Hi strell,

 Thanks for your replay,

I got this link already,but I am not getting specific  fpga emif design file the link which you have shared,there is only HPS EMIF design file..

As of now , mainly i need QSF file for FPGA EMIF(DDR4 memory)..if you get that....please share it..

 

 

yoichiK_intel
Employee
334 Views

please refer to the attachment.   change *txt to *qsf, could not attach qsf file.

srinivasan
Beginner
322 Views

Hi,

Thanks for sending the files...

Actually, arria 10 soc part number is 10s066N3F40E2SG...but in ed_synth.txt files they have mentioned 10s066N3f40I2SG...which i need to choose?

But in EMIF IP GUI i am selecting fpga development DDR4 HILO connector(x72)...If I select this , it automatically taking below part number...

arria 10 device:10s066N3f40I2SG

 

 

yoichiK_intel
Employee
313 Views

sorry ,attached wrong file. Here is the right one.

 

srinivasan
Beginner
294 Views
Hi,
Ya got it..thanks..
Which clock should I connect to signal tap analyser??
Whether I need to connect pll_ref_clock or clk_50mhz
yoichiK_intel
Employee
282 Views

pls use pll_ref clock for STP clocking.

srinivasan
Beginner
257 Views
Hi,
Can u please share your working EMIF DDR4 traffic generation project for arria 10 SoC development kit....
Reply