Reprogram Stratix 10 - Base Addresses are not being updated

[james57]

Hi all,

I have come to the realization that my H-tile Stratix 10 hardware design is not being programmed onto the board.  I have developed the GSRD configured for SD Card boot and then modified qsys_top.qsys to implement functionality that I want and modified top level verilog.

I then compile and replace the ghrd.core.rbf on the SD Card yet the board still is booting the stock GSRD design. 

Where is the hardware being booted from? How do I change which design the hardware is booting? 

Thanks

[aikeu]

Hi james57,

Are you following this document to build your design?

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderStratix10

Make sure the SW switches on the physical board are set acoordingly to determine board booting from SD card.

Thanks.

Regards,

Aik Eu

[james57]

Hi @aikeu 

I appreciate the reply, I have been able to get the design to work.

Do I have to rebuild Yocto/Linux every time I change the hardware design? Or is there a way to compile Quartus and update a bootfile manually (i.e., change the core.rbf file).

Thanks,

James

[aikeu]

Hi james57,

If only change the FPGA hardware design. You do not required to rebuild yocto and you can actually used pre-build yocto images from:

https://releases.rocketboards.org/2023.04/gsrd/s10_gsrd/rootfs/

As for linux kernel if the hardware design only consider the device tree changes. Referring to building bootloader(Stratix10) documentation below on building linux kernel section, you can just perform "make -j 64 dtbs" for device tree only instead of "make -j 64 Image dtbs"

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderStratix10

Thanks.

Regards,

Aik Eu

[james57]

Hi @aikeu 

Thank you! It would just be the FPGA hardware design changing. Could you tell me more about how to change the hardware design without rebuilding yocto specifically? Is there a command that I could run to then replace a file on the SD Card such that I am not using prebuilts? 

Thanks,

James

[aikeu · Accepted solution]

Hi james57,

Referring to build SD card section from the building bootloader document below, the yocto build is only for the rootfs.

You can considered the pre-build image for rootfs. Any file changes related to you FPGA design will be required to change accordinly unless it is unaffected to the whole project build when packaging the whole file into sdcard.img.

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderAgilex7#Build_SD_Card_Image

Thanks.

Regards,

Aik Eu

[james57]

Hi @aikeu 

For the purposes of clarity, say hypothetically I add a LED GIO peripheral to qsys_top.qsys of the GSRD on the LW bridge and assign a base address. To use this updated qsys design would I then need to recompile Linux/Yocto or could I use some work around on using the programming files from Quartus?

I am still a little confused sorry about the line of questioning.

Thanks,

James

[aikeu]

Hi james57,

You do not need to rebuild yocto but only the linux kernel device tree for your changes as you have described.

Thanks.

Regards,

Aik Eu

[aikeu]

Hi james57,

I will close this thread if no further question.

Thanks.

Regards,

Aik Eu

[aikeu]

Hi james57,

I will close this thread if no further question.

Thanks.

Regards,

Aik Eu

[james57]

Hi @aikeu 

I appreciate the help and I was able to successfully do what I intended after following these steps -

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderAgilex7#Build_SD_Card_Image

I appreciate the help!

James

[aikeu]

Hi james57,

Glad to hear your issue has been resolved and also glad that I was able to help on your issue!

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

Thanks.

Regards,

Aik Eu