Stratix 10 Devkit Board Update Portal

[n_nuti]

Dev kit I'm using:

TRANSCEIVER SIGNAL INTEGRITY DEVELOPMENT KIT, STRATIX® 10 GX EDITION

I'm trying to use the "build_hw.sh" script to convert my fpga ".sof" file into a ".bin" file that is usable by the board update portal... so I can program the user flash. I'm getting the following error even though I've used this ".sof" to program the FPGA several times. I have a NIOS II IP included in this ".sof" and I'm currently trying to separate it to see if the error goes away. Any other reason why this could happen?

[AR_A_Intel]

Hi

Welcome to Intel forum. For further checking could you provide

1) License.dat file

2) OS version use

3) full error.log file

4) assembler report .asm.rpt file

•           The assembler report is located in <Project directory>/Output_files/<project_name>.asm.rpt.

[n_nuti]

Hello,

I apologize for my slow response.

1) This is Quartus via the VNC so I'm not sure if I should touch the .dat file

2) OS:

NAME="SLES"
VERSION="12-SP5"
VERSION_ID="12.5"
PRETTY_NAME="SUSE Linux Enterprise Server 12 SP5"

3) Attached

4) Attached

Also, I did want to mention that I did manage to create the binary file through other means... but it caused the board to stop operating entirely. I needed to do this because this Stratix 10 FPGA is unable to produce .pof files through quartus natively. Essentially we needed to factory restore the board after all of this though.

Steps to get files required for board update portal:

1. Open Quartus

2. Assignments -> Device -> Device and pin options -> Device and pin options -> Configuration -> Set Configuration Scheme to AVSTx32

3. Recompile

4. File -> Programming File Generator

• Set Configuration mode to AVST x32
• Under output files, check Programmer Object File (.pof)
• Under input files, specify the .sof file
• Under Configuration Device, add device CFI_1GB (unsure if this was correct)

5. Generate the .pof

6. Ran the "build_hw.sh" to produce the .bin file

7. Ran the following the produce the .flash file for nios

• elf2flash --base=0x0 --end=0x0FFFFFFF --reset=0x09140000 --input=yourfile_sw.elf --output=yourfile_sw.flash

8. Put these files into the board update portal

Thank you

[AR_A_Intel]

Please give me some time to further check with teammate. I will get back to you with an update.

Thank you

[KellyJialin_Goh]

Hi,

May I know what is the current issue that you encounter? We can start working from there.

Thank you.

Regards,

Kelly

[KellyJialin_Goh]

Hi,

Is there any issue that I can help with? Hope to hear from you soon.

Thank you.

Regards,

Kelly Jialin

[n_nuti]

Hi there. I can't get the board update portal to work properly. 

1. For the stratix 10 transceiver signal integrity devkit, quartus can't inherently create the correct kind of "bin" file so I needed to try and create the file using "file -> convert programming files"

2. When I programmed the flash using the board update portal, the board became inoperable and I needed to figure out how to factory reset it.

The rest of the supplemental information can be found in my previous posts.

Thank you.

[KellyJialin_Goh]

Hi,

Kindly check out this link for more information: https://www.intel.com/content/www/us/en/docs/programmable/683206/current/using-the-board-update-portal.html

Hope this helps. Thank you.

Regards,

Kelly

[n_nuti]

Hello,

I've already tried that and it doesn't work. The error is in the first part of this post.

My response on "‎09-06-2022" details what exactly I did to get around the errors.

Thanks,

Nick

[KellyJialin_Goh]

Hi,

Just to double check, the necessary steps that you provided on the post dated 06/09/22 are correct for updating board portal and the board is now operating after carrying out these steps.

If everything is now working alright, I will set your post as solution and set this case to close-pending in the next 2 days. Hope to hear from you soon.

Thank you.

Regards,

Kelly

[n_nuti]

Hi Kelly,

Even though I navigated around the errors... nothing works. When I followed those steps the on-board CPLD MAX V flash was completely erased and the board had to be factory restored.

In other words, nothing works. Please read my previous messages on this post; there has been no progress with respect to the board update portal. I navigate through the errors but the end result is broken.

Nick

[KellyJialin_Goh]

Hi,

If that is the case, I will forward this issue to the engineering team and see what are their updates.

Thank you.

Regards,

Kelly

[KellyJialin_Goh]

Hi Nick,

I have got some news back from the engineering team and they would like to know the reason why quartus_cpf tool is used and not the quartus_pfg tool? Is this part of the script?

Hope to hear from you soon. Thank you.

Regards,

Kelly

[n_nuti]

Hello,

I apologize for my lack of response; I've been tasked with other things and this was put on the backburner due to priority.

The script can be found here: https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/stratix/10-gx-signal-integrity.html for the "Intel® Stratix® 10 GX SI H-Tile Package". This script was gathered from Intel's supplied files for the stratix 10 GX signal integrity development kit.

Is there a more-updated script that I can use that utilizes "quartus_pfg "?

What is the different between "quartus_cpf " and "quartus_pfg "?

Thanks,

Nick

[KellyJialin_Goh]

Hi,

Any updates from your side?

Regards,

Kelly

[KellyJialin_Goh]

Hi,

 As we do not receive any response from you on the previous question that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.

Thank you.

Regards,

Kelly Jialin, GOH