FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
6478 Discussions

date time in cyclone V FPGA

PShar30
Novice
‎07-29-2020 03:12 AM
1,099 Views
Solved Jump to solution

hi.

I am trying to implement a date_time clock which takes 1 pulse per second as a input to move the time ahead. My question is it is already implemented and available as IP. or I should write the VHDL from scratch that will include all the logic for month counts (30 or 31 days) and laep year consideration..!

 

Thankyou

Pratik

0 Kudos
1 Solution
JohnT_Intel
Employee
‎07-29-2020 08:53 PM
1,088 Views
Solved Jump to solution

Hi,


There is no existing IP on this and you will need to create yourself.


View solution in original post

Copy link

Link Copied

1 Reply
JohnT_Intel
Employee
‎07-29-2020 08:53 PM
1,089 Views
Solved Jump to solution

Hi,


There is no existing IP on this and you will need to create yourself.


Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.