Error (209014): CONFIG DONE is FAILED to go high
What is the problem?
I am using Quartus version 18.0 on linux.
FPGA MAX10 device number 10M08SAM156CBG
I enable Secure JTAG with Intel provided Internal JTAG block
with UNLOCK/LOCK ports out to I/O.
I pulled on UNLOCK port HIGH, send in UNLOCK JTAG COMMAND
[nyup@labOptiPlex2 test_unlock]$ quartus_jli -c 2 unlock_208.jam -a unlock
Info: Running Quartus Prime Jam Tools
Info: Version 18.0.0 Build 614 04/24/2018 SJ Standard Edition
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Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and its AMPP partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details.
Info: Processing started: Fri Sep 20 14:33:36 2019
Info: Command: quartus_jli -c 2 unlock_208.jam -a unlock
Info: Using INI file /opt/intelFPGA/18.0/quartus/linux64/quartus.ini
Exit code = 0... Success
Info: Quartus Prime Jam Tools was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 194 megabytes
Info: Processing ended: Fri Sep 20 14:33:39 2019
Info: Elapsed time: 00:00:03
Info: Total CPU time (on all processors): 00:00:00
'Purpose: To unlock
ACTION unlock = DO_UNLOCK;
IRSCAN 10, $208;
WAIT 100 USEC;
I tried with $041; too
This is weird. By right it should be able to program after you UNLOCK it. May i know, have you observed if "indicator" port is going HIGH? You may also refer to the steps to UNLOCK as shown at link below:
Hi Nhu-Ha Yup,
Sorry for the late, WYSIWYG is an internal JTAG interface. It doesn't control CONF_DONE pin directly but if the configuration is working successfully, the CONF_DONE pin will be asserted.
Just would like to check, have you used our reference design and also the JAM file provided? Or you use your own and obtain the following error? Please let me know.
Just for your information, you can obtain the reference design at link below:
The steps to use the reference design is in this AN556:
I have just tested on my side, seems like no problem in locking and unlocking. Just would like to check, how do you unlock the MAX10? From the above statement, seems like u were running the command to unlock. If it so, can you try to provide a pulse only to UNLOCK pin? With the unlock pulse, the JTAG will be changed from internal JTAG mode to external JTAG mode and thus you can do programming and erasing using JTAG. No command is needed to unlock.
Also, speaking about the design, once you program the POF file obtained from the reference design available at link below:
The device will change into JTAG secure mode once the device is powered on.