瀏覽論壇
開始主題| 標題 | Recent Message Time Column | |
|---|---|---|
|
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
| ||
|
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
| ||
|
FPGA Evaluation and Development Kits
| ||
|
University Program Material, Education Boards, and Laboratory Exercises
| ||
|
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
| ||
|
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
| ||
|
Support for SoC FPGA Software Development, SoC FPGA HPS Architecture, HPS SoC Boot and Configuration, Operating Systems
| ||
|
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
| ||
|
Support for Intel® High Level Synthesis Compiler, DSP Builder, OneAPI for Intel® FPGAs, Intel® FPGA SDK for OpenCL™
| ||
|
Installation and Licensing that’s includes Intel Quartus® Prime software, ModelSim* - Intel FPGA Edition software, Nios® II Embedded Design Suite on Windows or Linux operating systems.
| ||
|
Welcome to the Intel FPGA Wiki
|
