Intel® FPGA University Program
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Audio Processing in DE1

Altera_Forum
Honored Contributor II
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Hi, 

 

I want to capture input from the line in input on the board and convert it to digital for processing on FPGA without Nios II.  

The examples on the CD weren't helpful. i2sound example bypasses the line in and mic inputs and directs them to line out.  

I couldn't figure out how to configure the audio codec to capture the analog input and convert it to digital and send it to dac again to play the audio. 

I am assuming that I need to use the slave mode operation. I wonder how I can see the captured input on a register in FPGA.  

Any help will be appreciated!  

 

Thanks in advance
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Altera_Forum
Honored Contributor II
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I don't see a clear preference for master or slave mode, both can work. The i2c_sound demonstration runs the Codec in master mode, but as you said, it's not processing the data or clock at all, just performs an ADC to DAC loopback. 

 

To record or sendout data, you need shift registers, clocked by BCLK and captured/loaded on LRC (frame clock) edges. Unfortunately, no demonstration is provided for this basically simple process.
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Altera_Forum
Honored Contributor II
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Thanks for your kind reply. 

 

So, according to what I understand, my data input to the shift register is going to be AUD_ADCDAT and after I process the signal, I will send the data to AUD_DACDAT bit by bit at every LRC edge. 

 

Is this correct?
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Altera_Forum
Honored Contributor II
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đkm I am VietNam :D

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