DDR PHY Problem

Altera_Forum · ‎09-02-2015

Hi :

I got a project have to create a environment (PHY & Memory controller) for using LPDDR3 on Cyclone V. But Cyclone V don't support PHY for LPDDR3.

So I think to try using PHY of LPDDR2 and adding ODT pin to generate new PHY for LPDDR3.

I want to ask can this idea work? Am I lost something? Except ODT pin, is there any different between two PHY?

Thanks.

Altera_Forum · ‎09-22-2015

Hi,

well regarding comparing LPDDR2 and LPDDR3 you find on wikipedia (https://en.wikipedia.org/wiki/mobile_ddr#cite_note-lpddr3-5): "The command encoding is identical to LPDDR2, using a 10-bit double data rate CA bus.[SUP][5] (https://en.wikipedia.org/wiki/mobile_ddr#cite_note-lpddr3-5)[/SUP] However, the standard only specifies 8n-prefetch DRAM, and does not include the flash memory commands." The page also links to the documents of the both standards. These should clarify your questions.

I think the main issue will be writing a controller for the Cyclone V device. However, I hope this was of any help.

Cheers,

Fade