my final project:nios2 based PLC

[Altera_Forum]

hello experts 

i am a student who is doing my final project which design a nios2 processor and compile it into DE1 board and transform it become a PLC   i am now practicing the quartus2 and sopc according to the tutorial from the book name rapid prototyping of digital system.   when i was configuring the nios2 following the step of the tutorial, one of the step need to add the sram from university program de1 board component list, but i can not find any university program de1 board option in my component list. can you guys guide me?thanks     i am using quartus2 web edition v8.1 installed program as below -nios2 eds 8.0 -university program ip core 8.0 -altera monitor program     i also try this tutorial in other pc which is using quartus2 web edition 10.0 without any problem. my lecturer request us to use quartus2 v8.1 because he said this version is stable.

[Altera_Forum]

You need to download University IP suite from Altera. Try to use 9.1 or later. There were many bugs in 8.x.

[Altera_Forum]

My final project I had written some c codes in Nios2 processor and simulated using Nios2 ISS and I need to extract the profiling details like execution time and program and data memory used.Can anyone explain me a method to extract profiling datas from Nios? It is very urgent.Please help me?

[Altera_Forum]

In Eclipse IDE, under BSP project, you can enable profiling. There is a PDF from Altera. Here is the link, 

 http://www.altera.com/literature/an/an391.pdf