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Altera_Forum
Honored Contributor I
712 Views

problems working through Using tse on DE2-115 boards from May 2015

Hi, 

 

The tutorial "Using Triple-Speed Ethernet on DE2-115 Boards seems not up to date although it says that it is for Quartus II 15.0 and is dated May2015: 

 

- Page 13, section 3.2 point 2&3 - there is no ALTPLL but Avaon ALTPLL and Qsys does not ask for a filename to save the IP variation 

 

- Page 16 the summary tab does not exist, and more importantly there is no "Basic Functions > I/O" hence also no ALTDDIO_OUT - at least not on my Quartus II 15.0 web edition. 

 

Thank you in advance for responding.
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3 Replies
Altera_Forum
Honored Contributor I
14 Views

You might want to file a service request to Altera to get them update the tutorial.

Altera_Forum
Honored Contributor I
14 Views

Ok I just did post a service request.

Altera_Forum
Honored Contributor I
14 Views

Hi, 

 

Just to close this, it was my mistake that I was looking in the IP Catalog of Qsys instead of Quartus II. And the document says: 

 

"Besides the subsystem built using Qsys, you need a Phase-Locked Loop (PLL) module to generate clocks with 

different frequencies to make the Triple-Speed Ethernet system work properly. The PLL will take a 50 MHz input 

clock, and output the desired clocks. To add the PLL block, perform the following:" 

 

Redirecting the reader (such as me :) ) back to Quartus would be useful in this document. Because both Qsys and Quartus have the IP Catalog window. 

 

I feel stupid.