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Dpcpp++ unable to handle switch -MD -MT -MF with -fintelfpga

Tse__Amon
Beginner
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Hello Support Team,

I am trying to use cmake to generate build script for Dpcpp for FPGA target.

The following is a compilation command generated to compile a sycl cxx source code target for FPGA but the dpcpp returns error (running on Ubuntu 18.04):

/opt/intel/oneapi/compiler/2021.1.1/linux/bin/dpcpp -DFPGA_EMULATOR -DUSE_DPCPP -I../.. -g -g -g -fintelfpga -std=gnu++17 -MD -MT parallel/CMakeFiles/parallel.dir/iota_parallel.cpp.o -MF parallel/CMakeFiles/parallel.dir/iota_parallel.cpp.o.d -o parallel/CMakeFiles/parallel.dir/iota_parallel.cpp.o -c ../parallel/iota_parallel.cpp
/opt/intel/oneapi/compiler/2021.1.1/linux/bin/clang-offload-bundler: error: number of input files and targets should match in bundling mode
dpcpp: error: clang-offload-bundler command failed with exit code 1 (use -v to see invocation)

If I remove manually the -MD -MT and -MF switches, then the compilation can be successfully completed.

 

A note here that dpcpp can work with -MD -MT -MF if -fintelfpga is absent (for sycl code not target for FPGA). 

 

May Intel engineer please follow.

Best Regards,

Amon

 

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PrasanthD_intel
Moderator
1,623 Views

Hi Amon,


Thanks for reaching out to us.

We will contact the internal team for the exact reason behind the error.

For time being we have observed that if you remove the -c flag and directly provide the input file there was no error.

We will get back to you soon.


Regards

Prasanth


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PrasanthD_intel
Moderator
1,589 Views

Hi Amon,


We have gone through your query and found that it is related to FPGA as there are no errors when -fintelfpga flag is removed.

Since your issue is related to FPGA, we have a dedicated forum for FPGA related issues.

We are redirecting this thread to FPGA Forum for faster response.

Have a Good day.

 

Thanks & Regards

Prasanth


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Kenny_Tan
Moderator
1,553 Views

Sorry for the late reply due to long holiday,


Do you mind to share with us the functionality -MD -MT and -MF switches ? This would be an enhancement to FPGA One API.


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Kenny_Tan
Moderator
1,537 Views

any update from the previous queries?


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Kenny_Tan
Moderator
1,516 Views

any update from the previous queries?



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Kenny_Tan
Moderator
1,501 Views

We do not receive any response from you to the previous question that we have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions. 


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