I have a specific need to be able to perform a simultaneous read and write to the same memory address in a dual-port RAM with the output of the RAM showing the newly written data. According to this post, this is possible in RTL: What happens when I perform a simultaneous read and write to the same address in dual-port RAM? (intel.com).
Clearly, this is a memory dependency in HLS that will cause the compiler to increase the initiation interval. As I am new to intel HLS, I don’t understand how the ivdep pragma works and I am not sure if it can actually be used to force a simultaneous read and write to the same address. Is this something possible in HLS?
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From my understanding it can be done, however it is not recommended as the data width will be reduced.
Perhaps I would recommend to look into the memory configuration example in the following location <quartus_installation_dir>\hls\examples\tutorials\component_memories\memory_bank_configuration.
The example provide example as well as some explain on how memory can be configured.
As for ivdep pragma further explanation can be found here.
Please do have a look and if that helps clarify your doubts.
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