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Hi,
There are a couple of incorrect links (references) to "Figure 6-4. Stack Usage on Transfers to Interrupt and Exception-Handling Routines" in the Intel® 64 and IA-32 Architectures Software Developer’s Manual.
Under "6.12.1 Exception- or Interrupt-Handler Procedures" there are couple of links to the Figure 6-4 as below but are actually linked to "Table 6-4. Interrupt and Exception Classes".
The processor then saves the current state of the EFLAGS, CS, and EIP registers on the new stack (see Figures 6-4).
and
a. The processor saves the current state of the EFLAGS, CS, and EIP registers on the current stack (see Figures 6-4).
Also, such links typically use a singular, e.g., (see Figure 9-1), when they refer to a single figure regardless of whether the figure contains multiple illustrations in it. Please consider to change this (it slightly makes searching difficult).
Note that I am looking at "Order Number: 325462-067US May 2018" revision.
- Tags:
- Intel® Advanced Vector Extensions (Intel® AVX)
- Intel® Streaming SIMD Extensions
- Parallel Computing
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i forwarded your posting to our doc team. thx
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