Intel® ISA Extensions
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could not decode some pattern of vgatherdps

mitsunari_s_
Beginner
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The byte code of `vgatherdps zmm0{k1}, [rax + zmm0]` is 62F27D49920400. But >xed -d 62F27D49920400 >62F27D49920400 >ERROR: GATHER_REGS Could not decode at offset: 0x0 PC: 0x0: [62F27D499204000000000000000000] The reason of this error may be that the index and the destination registers are the same and it results a UD fault. But -d option is not to emutate the byte code but to decode one instruction, so I expect that xed shows the result of disassemble. How about it? verions of xed. >Copyright (C) 2017, Intel Corporation. All rights reserved. >XED version: [8.15.0-6-gb862fe0]
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MarkC_Intel
Moderator
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A #UD is not a valid instruction so there is technically nothing to decode or disassemble here.

FWIW, I did try to give a helpful error indicator for this case.

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mitsunari_s_
Beginner
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Thank you. I see. I would be happy if xed shows a helpful message in the same way that shows ud2 for 0f0b.
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MarkC_Intel
Moderator
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UD2 is an instruction, that is different. You have a helpful error message already: "ERROR: GATHER_REGS"

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mitsunari_s_
Beginner
660 Views

>You have a helpful error message already: "ERROR: GATHER_REGS"

I see. My understanding was wrong.

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