Intel® ISA Extensions
Use hardware-based isolation and memory encryption to provide more code protection in your solutions.

purpose of xcr0_supports_palette()

Beulich__Jan
Beginner
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The operation section of LDTILECFG uses this function for determining one of the #GP(0) reasons. However, the respective exception class AMX-E1 mandates #UD anyway when one or both of the respective XCR0 bits are clear. What's the deal here?

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