CPU Features - Available vs. Enabled

[Bob_Kirnum]

I am trying to use the ippGetCpuFeatures and ippGetEnabledCpuFeatures to display details about the features available and enabled in the operating environment.  After calling ippInit the proper CPU / library appears to be selected.  However, the features appear to be a bit off.  Below are the results from one of the newer platforms we are using.  Can anyone explain why there are many more features available but not enabled?

Thanks,

Bob

Processor supports Advanced Vector Extensions instruction set
8 cores on die
ippGetMaxCacheSizeB 20480 k
ippGetCpuFeaturesAvaileble 0xfdf l_FeatureMaskEnabled 0x7
MMX Y Y (available / enabled)
SSE Y Y
SSE2 Y Y
SSE3 Y N
SSSE3 Y N
MOVBE N N
SSE41 Y N
SSE42 Y N
AVX Y N
AVX(OS) Y N
AES Y N
CLMUL Y N
ABR N N
RDRRAND N N
F16C N N
AVX2 N N

[Ying_H_Intel]

Hi Bob, ippGetCpuFeatures detect the processor features ippGetEnabledCpuFeatures, This function detects the enabled CPU features for the currently loaded libraries. So it depends on the loaded libraries. Could you please attached the code and related link command? I did a quick try on one sandy-bridge runing window 7 machine and static link. #include "stdio.h" #include "stdlib.h" #include "memory.h" #include "math.h" #include "ipp.h" int main(int argc, char* argv[]) { Ipp64u pFeaturesMask; Ipp32u pCpuidInfoRegs[4]; ippGetCpuFeatures(&pFeaturesMask,pCpuidInfoRegs); Ipp64u maskA1=ippGetEnabledCpuFeatures(); ippInit(); Ipp64u maskA2=ippGetEnabledCpuFeatures(); const IppLibraryVersion* lib = ippvmGetLibVersion(); printf("%s %s %d.%d.%d.%d\n", lib->Name, lib->Version, lib->major, lib->minor, lib->majorBuild, lib->build); } link ippvm_l.lib ippcore_l.lib from C:\Program Files %28x86%29\Intel\Composer XE 2013\ipp\lib\ia32 The value in inpFeaturesMask : 0x0fdf in first maskA1 : 0x003 ( before the ippinit()) in sencod maskA2: 0x0fdf (after the ippinit()); Best Regards, Ying

[SergeyKostrov]

>>... >>SSE Y Y >>SSE2 Y Y >>SSE3 Y N >>SSSE3 Y N >>SSE41 Y N >>SSE42 Y N >>... It looks like a Pentium 4. So, could you provide a model code for your CPU and IPP library version?

[SergeyKostrov]

>>...It looks like a Pentium 4... I found in my archive records a list of generic features for Pentium 4: ... HTT and Streaming SIMD Extensions features: HTT : 1 MMX : 1 SSE : 1 SSE2 : 1 SSE3 : 0 SSSE3 : 0 SSE4.1: 0 SSE4.2: 0 ...

[Bob_Kirnum]

Thanks to all for the replies. I do not have the 7.1 libraries for Windows, just Linux. Here is my code. From this and the previously provided debug output you should see the CPU type. Clearly not a Pentium 4. ippInit(); if (!m_bDisplayedIPPCPUFeatures) { m_bDisplayedIPPCPUFeatures = true; DisplayIPPCPUFeatures(); } void DisplayIPPCPUFeatures() { IppStatus l_Status; //Can be useful for debugging/profiling //Get version info //COMMENTED OUT BECAUSE ippiGetLibVersion IS UNRESOLVED // const IppLibraryVersion *lib = ippiGetLibVersion(); // printf("%s %s\n", lib->Name, lib->Version); switch (ippGetCpuType()) { default: case ippCpuUnknown: printf("Unknown (%x)\n", (unsigned)ippGetCpuType()); break; case ippCpuPP: printf("Intel(R) Pentium(R) processor\n"); break; case ippCpuPMX: printf("Pentium(R) processor with MMX(TM) technology\n"); break; case ippCpuPPR: printf("Pentium(R) Pro processor\n"); break; case ippCpuPII: printf("Pentium(R) II processor\n"); break; case ippCpuPIII: printf("Pentium(R) III processor and Pentium(R) III Xeon(R) processor\n"); break; case ippCpuP4: printf("Pentium(R) 4 processor and Intel(R) Xeon(R) processor\n"); break; case ippCpuP4HT: printf("Pentium(R) 4 Processor with HT Technology\n"); break; case ippCpuP4HT2: printf("Pentium(R) 4 processor with Streaming SIMD Extensions 3\n"); break; case ippCpuCentrino: printf("Intel(R) Centrino(TM) mobile technology\n"); break; case ippCpuCoreSolo: printf("Intel(R) Core(TM) Solo processor\n"); break; case ippCpuCoreDuo: printf("Intel(R) Core(TM) Duo processor\n"); break; case ippCpuITP: printf("Intel(R) Itanium(R) processor\n"); break; case ippCpuITP2: printf("Intel(R) Itanium(R) 2 processor\n"); break; case ippCpuEM64T: printf("Intel(R) 64 Instruction Set Architecture (ISA)\n"); break; case ippCpuC2D: printf("Intel(R) Core(TM) 2 Duo processor\n"); break; case ippCpuC2Q: printf("Intel(R) Core(TM) 2 Quad processor\n"); break; case ippCpuPenryn: printf("Intel(R) Core(TM) 2 processor with Intel(R) SSE4.1\n"); break; case ippCpuBonnell: printf("Intel(R) Atom(TM) processor\n"); break; case ippCpuNehalem: printf("Intel(R) Core(TM) i7 processor\n"); break; case ippCpuNext: printf("Next\n"); break; case ippCpuSSE: printf("Processor supports Streaming SIMD Extensions instruction set\n"); break; case ippCpuSSE2: printf("Processor supports Streaming SIMD Extensions 2 instruction set\n"); break; case ippCpuSSE3: printf("Processor supports Streaming SIMD Extensions 3 instruction set\n"); break; case ippCpuSSSE3: printf("Processor supports Supplemental Streaming SIMD Extension 3 instruction set\n"); break; case ippCpuSSE41: printf("Processor supports Streaming SIMD Extensions 4.1 instruction set\n"); break; case ippCpuSSE42: printf("Processor supports Streaming SIMD Extensions 4.2 instruction set\n"); break; case ippCpuAVX: printf("Processor supports Advanced Vector Extensions instruction set\n"); break; case ippCpuAES: printf("Processor supports AES New Instructions\n"); break; case ippCpuF16RND: printf("Processor supports RDRRAND & Float16 instructions\n"); break; case ippCpuAVX2: printf("Processor supports Advanced Vector Extensions 2 instruction set\n"); break; case ippCpuX8664: printf("Processor supports 64 bit extension\n"); break; } printf(" %d cores on die\n", ippGetNumCoresOnDie()); int l_iMaxCacheSizeB = 0; l_Status = ippGetMaxCacheSizeB (&l_iMaxCacheSizeB); switch (l_Status) { case ippStsNullPtrErr: printf("ippGetMaxCacheSizeB ippStsNullPtrErr\n"); break; case ippStsNotSupportedCpu: printf("ippGetMaxCacheSizeB ippStsNotSupportedCpu\n"); break; case ippStsUnknownCacheSize: printf("ippGetMaxCacheSizeB ippStsUnknownCacheSize\n"); break; default: printf("ippGetMaxCacheSizeB unexpected status %#x\n", (unsigned)l_Status); break; case ippStsNoErr: printf("ippGetMaxCacheSizeB %d k\n", l_iMaxCacheSizeB / 1024); break; } Ipp64u l_FeatureMaskAvailable = 0; Ipp64u l_FeatureMaskEnabled = 0; Ipp32u l_CpuidInfoRegs[4] = {0}; //Get CPU features available with selected library level ippGetCpuFeatures (&l_FeatureMaskAvailable, l_CpuidInfoRegs); //Get CPU features enabled with selected library level l_FeatureMaskEnabled = ippGetEnabledCpuFeatures(); printf("ippGetCpuFeaturesAvaileble %#llx l_FeatureMaskEnabled %#llx\n",l_FeatureMaskAvailable, l_FeatureMaskEnabled); printf("MMX %c %c\n", (l_FeatureMaskAvailable & ippCPUID_MMX)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_MMX)?'Y':'N'); printf("SSE %c %c\n", (l_FeatureMaskAvailable & ippCPUID_SSE)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_SSE)?'Y':'N'); printf("SSE2 %c %c\n", (l_FeatureMaskAvailable & ippCPUID_SSE2)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_SSE2)?'Y':'N'); printf("SSE3 %c %c\n", (l_FeatureMaskAvailable & ippCPUID_SSE3)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_SSE3)?'Y':'N'); printf("SSSE3 %c %c\n", (l_FeatureMaskAvailable & ippCPUID_SSSE3)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_SSSE3)?'Y':'N'); printf("MOVBE %c %c\n", (l_FeatureMaskAvailable & ippCPUID_MOVBE)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_MOVBE)?'Y':'N'); printf("SSE41 %c %c\n", (l_FeatureMaskAvailable & ippCPUID_SSE41)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_SSE41)?'Y':'N'); printf("SSE42 %c %c\n", (l_FeatureMaskAvailable & ippCPUID_SSE42)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_SSE42)?'Y':'N'); printf("AVX %c %c\n", (l_FeatureMaskAvailable & ippCPUID_AVX)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_AVX)?'Y':'N'); printf("AVX(OS) %c %c\n", (l_FeatureMaskAvailable & ippAVX_ENABLEDBYOS)?'Y':'N', (l_FeatureMaskEnabled & ippAVX_ENABLEDBYOS)?'Y':'N'); printf("AES %c %c\n", (l_FeatureMaskAvailable & ippCPUID_AES)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_AES)?'Y':'N'); printf("CLMUL %c %c\n", (l_FeatureMaskAvailable & ippCPUID_CLMUL)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_CLMUL)?'Y':'N'); printf("ABR %c %c\n", (l_FeatureMaskAvailable & ippCPUID_ABR)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_ABR)?'Y':'N'); printf("RDRRAND %c %c\n", (l_FeatureMaskAvailable & ippCPUID_RDRRAND)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_RDRRAND)?'Y':'N'); printf("F16C %c %c\n", (l_FeatureMaskAvailable & ippCPUID_F16C)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_F16C)?'Y':'N'); printf("AVX2 %c %c\n", (l_FeatureMaskAvailable & ippCPUID_AVX2)?'Y':'N', (l_FeatureMaskEnabled & ippCPUID_AVX2)?'Y':'N'); }

[Bob_Kirnum]

I should also add that this is an E5-2665 based server which has 64 bit Linux (CentOS release 6.3 (Final)) installed.

[SergeyKostrov]

Thanks for the codes and they should work on boths platforms. I think there is some issue with how Intel developers called a primary function: 'ippGetCpuFeatures' instead of 'ippGetInstructionSets' I mean Intel CPUs have Features and support Instruction Sets. For example: Features: Intel Hyper-Threading Technology, or Intel SpeedStep Technology, or Intel TurboBoost Technology, etc and Instruction Sets: SSE, SSE2, SSE3, etc A Feature of some CPU could be in two states Enabled or Disabled and controlled in BIOS. However, Instruction Sets could not be Disabled in BIOS.

[Bob_Kirnum]

Thanks Sergey. So, is this a bug with 'ippGetEnabledCpuFeatures' or are the IPP libraries not being initialized properly? Are the libraries allowing me to take full advantage of this E5-2665 platform? Also, any idea why the 'ippiGetLibVersion' is unresolved? Thanks, Bob

[Sergey_K_Intel]

Hi Robert, If you have access to IPP samples, you could try "advanced-usage/cpuinfo" sample, which generates a log ot information about CPU/features/cache, etc. According to its specification E5-2665 is a very good CPU with lot of features. But you know, that some CPU features can be controlled through BIOS (Sergey is completely right here), some CPU features can be enabled/disabled during particular CPU line manufacturing (like AES, for example), some CPU features must be explicitily turned on during particular OS initialization (if OS doesn't do this in particular version, the CPU feature will be anavailable). So, try "cpuinfo". In you case, as you have Sandy Bridge EP CPU, if everything OK regarding CPU features enabling, the most suitable library should be e9 (or g9 for IA32 mode). Regards, Sergey

[SergeyKostrov]

Hi everybody, >>...So, is this a bug with 'ippGetEnabledCpuFeatures' or are the IPP libraries not being initialized properly?.. I don't know. I also noted that you're using 'ippvmGetLibVersion'. Could you try 'ippGetLibVersion' or 'ippiGetLibVersion' versions?

[Bob_Kirnum]

I have the IPP sample code and have started the tedious process of building the 'cpuinfo' application. Have to get right version of cmake, etc. I am not using 'ippvmGetLibVersion', this was suggested by Ying but appears to be Windows-specific. I have tried using both 'ippGetLibVersion' and 'ippiGetLibVersion' and both are unresolved.

[Bob_Kirnum]

Ok, got the samples building on the target system. Attached the cpuinfo output.

[Bob_Kirnum]

Looking at the cpuinfo sample code it calls 'ippGetCpuFeatures' but not 'ippGetEnabledCpuFeatures'. The results it displays for 'ippGetCpuFeatures' matches that produced by my code. The sample code does not call any variant of the 'ipp*GetLibVersion' so there it provides no additional help with that issue.

[Bob_Kirnum]

Just found the following in the ippcore.h file. Do I need to call both ippEnableCpu and ippInit? If I run the exact code on a non-AVX platform will it dispatch the correct libraries? // Notes: The ippInit() call without calling ippEnableCpu() as well as ippEnableCpu // without ippInit() call will not dispatch AVX code, even if you run code on Intel AVX // enabled platform. Call the functions sequentially: // ippEnableCpu(ippCpuAVX); ippInit(); to dispatch IPP AVX code. // The function works and could be useful for ippCpuAVX processor type only.

[SergeyKostrov]

>>... >>If I run the exact code on a non-AVX platform will it dispatch the correct libraries? >> >>// Notes: The ippInit() call without calling ippEnableCpu() as well as ippEnableCpu >>// without ippInit() call will not dispatch AVX code, even if you run code on Intel AVX >>// enabled platform. Call the functions sequentially: >>// ippEnableCpu(ippCpuAVX); ippInit(); to dispatch IPP AVX code. >>// The function works and could be useful for ippCpuAVX processor type only. Please follow the recommendation and report your results. Thank in advance.

[Sergey_K_Intel]

Bob Kirnum wrote:

I am not using 'ippvmGetLibVersion', this was suggested by Ying but appears to be Windows-specific. I have tried using both 'ippGetLibVersion' and 'ippiGetLibVersion' and both are unresolved.

GetLibVersion functions are OS-independent. They return pointer to a struct with build numbers and library name string. They are helpful to define what IPP library is used finally after CPU dispatcher initialization. ippGetLibVersion is in ippcore library, ippiGetLibVersion is in ippi library. Check your command line for linker if the libraries are in there. Regards, Sergey