Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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3-bit-counter problem

Altera_Forum
Honored Contributor II
1,996 Views

Hi, I created a 3-bit synchronous counter with an lpm to divide the clock frequency. It compiles properly, but will not simulate ,and it is driving me nuts. Ive tried starting new projects and starting over with no success. Does anyone know what the problem is?

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Altera_Forum
Honored Contributor II
1,094 Views

I think probably because you are using megawizard cell and it a blackbox. 

can you add the post error message/transcript of simulation otherwise hard to tell
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Altera_Forum
Honored Contributor II
1,094 Views

this is because your simulation might not be reaching a point where q[11] becomes '1'. The simulation ends before that. You can check it using other output line that goes '1' and then '0' before the simulation ends. The div_count block works perfectly fine.

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Altera_Forum
Honored Contributor II
1,094 Views

Is there a way to make it so that q[11] goes high in the simulation? I ask this ,because I have to take a screen shot of the simulation for a class I am in, and then I have to program it to my altera board. I have been stressing over this for the past two days. I just can't get it.

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Altera_Forum
Honored Contributor II
1,094 Views

p0 goes high after 40.96 us in your simulation, correctly as required by the design logic. You may want to set the simulation End Time to a higher value than default 1 us. The setting is in the Waveform Editors edit menu.

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