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AHDL to Block Diagram File

Altera_Forum
Honored Contributor II
‎10-24-2012 03:17 AM
1,437 Views

I am pretty new to Quartus II but I have some computer programming background. I was wondering if there was a way to convert an AHDL file to a Block Diagram File so that the basic logic could be evaluated. 

Thank you very much.
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Altera_Forum
Honored Contributor II
‎10-24-2012 07:00 AM
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You can compile the logic and inspect the RTL netlist.

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Altera_Forum
Honored Contributor II
‎10-24-2012 07:51 AM
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I highly recommend you move over to a less defunct HDL language (ie. VHDL or Verilog) so that you can perform HDL simulations.

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