AHDL to Block Diagram File

[Altera_Forum]

I am pretty new to Quartus II but I have some computer programming background. I was wondering if there was a way to convert an AHDL file to a Block Diagram File so that the basic logic could be evaluated. 

Thank you very much.

[Altera_Forum]

You can compile the logic and inspect the RTL netlist.

[Altera_Forum]

I highly recommend you move over to a less defunct HDL language (ie. VHDL or Verilog) so that you can perform HDL simulations.