Arria V DDR3 EMIF toolkit "Unable to establish a connection..."

[yianchr11]

Hello,

I have been trying to debug a DDR3 memory connected to an Arria V 5AGXMA3D4F27I3 device with Quartus prime standard 18.1.0, 18.1.1, 21.1.2 with no success. Using the "DDR3 SDRAM Controller with UniPHY Intel FPGA IP" I filled out the parameters according to the DDR3 SDRAM datasheet and generated the example design as well. 

I have successfully compiled the example design project, with the pinout matching that of the schematics for the above custom board. There are no critical warnings apart from drv_status_fail, drv_status_pass, drv_status_test_complete, local_cal_fail, local_cal_success, local_init_done being unconnected. The device is programmed using Altera USB-Blaster through JTAG.

Using the EMIF toolkit in all three Quartus version I mentioned above, I got the following messages after initializing connections and linking project to device:

Preparing to create a connection to System Console. This may take several seconds.

A connection to System Console was successfully established on port 52010

link_project_to_device -device_name {5AG(TMC3D3|XBA3D4|XBA3D6)|..@1#USB-0} -hardware_name {USB-Blaster on localhost (USB-0)} -sof_file {C:/intelFPGA/Projects/DDR3_example3/DDR3_example3_example_design/example_project/DDR3_example3_example.sof}

Linking device 5AG(TMC3D3|XBA3D4|XBA3D6)|..@1#USB-0 on hardware USB-Blaster on localhost (USB-0) using .sof file C:/intelFPGA/Projects/DDR3_example3/DDR3_example3_example_design/example_project/DDR3_example3_example.sof.

System Console warning during design link: DDR3_example3_example.sopcinfo not found, debug agents within this component may not function correctly.

Using hierarchy path DDR3_example3_example_if0:if0|DDR3_example3_example_if0_dmaster:dmaster|altera_avalon_st_jtag_interface:jtag_phy_embedded_in_jtag_master|altera_jtag_sld_node:node|sld_virtual_jtag_basic:sld_virtual_jtag_component|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst for connection /devices/5AG(TMC3D3|XBA3D4|XBA3D6)|..@1#USB-0/(link)/JTAG/alt_sld_fab_sldfabric.node_0/jtag_phy_0.jtag/master.

Using hierarchy path sld_signaltap:auto_signaltap_0 for connection /devices/5AG(TMC3D3|XBA3D4|XBA3D6)|..@1#USB-0/(link)/JTAG/alt_sld_fab_sldfabric.node_1.

Using hierarchy path DDR3_example3_example_if0:if0|DDR3_example3_example_if0_dmaster:dmaster|altera_avalon_st_jtag_interface:jtag_phy_embedded_in_jtag_master|altera_jtag_sld_node:node|sld_virtual_jtag_basic:sld_virtual_jtag_component|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst for connection /devices/5AG(TMC3D3|XBA3D4|XBA3D6)|..@1#USB-0/(link)/JTAG/alt_sld_fab_sldfabric.node_0/jtag_phy_0.jtag/master.

Using hierarchy path sld_signaltap:auto_signaltap_0 for connection /devices/5AG(TMC3D3|XBA3D4|XBA3D6)|..@1#USB-0/(link)/JTAG/alt_sld_fab_sldfabric.node_1.

Could not accurately determine connection type for connection DDR3_example3_example_if0:if0|DDR3_example3_example_if0_dmaster:dmaster|altera_avalon_st_jtag_interface:jtag_phy_embedded_in_jtag_master|altera_jtag_sld_node:node|sld_virtual_jtag_basic:sld_virtual_jtag_component|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst as the clock of the connection is inactive.

Could not accurately determine connection type for connection DDR3_example3_example_if0:if0|DDR3_example3_example_if0_dmaster:dmaster|altera_avalon_st_jtag_interface:jtag_phy_embedded_in_jtag_master|altera_jtag_sld_node:node|sld_virtual_jtag_basic:sld_virtual_jtag_component|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst as the clock of the connection is inactive.

Could not accurately determine connection type for connection DDR3_example3_example_if0:if0|DDR3_example3_example_if0_dmaster:dmaster|altera_avalon_st_jtag_interface:jtag_phy_embedded_in_jtag_master|altera_jtag_sld_node:node|sld_virtual_jtag_basic:sld_virtual_jtag_component|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst as the clock of the connection is inactive.

After clicking "Create memory interface connection..." it gives me the message "Unable to establish a connection because no memory interface targets exist on the linked device".

I suspect it has something to do with the above warnings.

Any help on how to fix the problem is appreciated. 

[AdzimZM_Intel]

Hello,

Thank you for submitting your question in Intel Community.

I'm Adzim, will assist you in this thread.

Regarding the error message "Unable to establish a connection because no memory interface targets exist on the linked device", you need to verify that your Quartus project contains the .qsf, .qpf and .sof files in the working directory.

These files are the minimum file set to run EMIF Toolkit.

Have you enabled the debugging option in the EMIF IP?

Regards,

Adzim

[yianchr11]

Hello,

All the files you listed are within the working directory.

Before I just had "Option 1" selected at the debugging options. I also enabled the EMIF On-chip debug port, and the the above warnings went away when linking to device and I'm able to create memory interface connection, but I got a guaranteed read failure. Now Quartus crashes whenever I'm trying to link device to project.

Correct me if I'm wrong, but from my understanding, on-chip debug port is not needed for the EMIF toolkit itself to work, but for access to EMIF calibration through user logic (https://www.intel.com/content/www/us/en/docs/programmable/683841/17-0/on-chip-debug-port-for-uniphy-based-emif-ip.html) and "Option 1" is what you're referring to.

Are there any other possibilities for getting these problems?

Regards,

Yiannis

[AdzimZM_Intel]

Hello Yiannis,

Thank you for your feedback.

Yes your understanding is correct. Usually the on-chip debug port option is not need to run the EMIF Debug Toolkit.

If you're not using on-chip debug port option, the calibration status is success?

I think the calibration status can be identified with local_cal_success and local_cal_fail signals.

Usually we will make sure:

• The device is identical to the board
• Pin constraint is matched to the board
• Hardware connection is correct

Sometimes the JTAG frequency can cause the issue as well.

You may try to reduce the JTAG frequency as low as possible.

If you disable the debugging option, do you see the calibration issue as well?

Regards,

Adzim

[yianchr11]

Hi Adzim,

I've turned off on-chip debug port and it was able to create memory interface connection, but in either case the calibration status fails at DQS group 0. I've checked with the signal tap analyzer as well and local_cal_fail is high and local_cal_success and local_init done are low. Also the global_reset_n, soft_reset_n and afi_reset_n are high, but mem_reset_n is low. I've attached some screenshots that show this.

I've also tried to use USB-Blaster II with 6MHz and there was no difference.

Regards,

Yiannis

[AdzimZM_Intel]

Hi Yiannis,

Thank you for your feedback.

Based on your result, this indicate that the EMIF interface is failing calibration.

You will need to troubleshoot on the EMIF example design based on the failing stage indicated in the EMIF Debug toolkit.

Since the EMIF toolkit issue has been resolved, I would suggest for you to open another thread for getting some advices from the Intel experts and community users based on the calibration issue.

Regards,

Adzim