Hi all,I am trying to achieve a way to add sources files from a megawizard generated IP block which is part of my own Qsys custom IP component. Instead of manually adding all qip contents to my _hw.tcl file with the add_fileset_file I would like to add the qip file contents automatically. One other option would be that my custom IP component adds the qip files automatically to the quartus qsf file but how to achieve that? Regards Henk
If you add the .qsys file to your Quartus Project instead of a .qip, the system will get regenerated whenever you compile the project, incorporating any changes you've made to your custom component. Is that what you're trying to achieve? It's not clear.
Hi, this is not what I meant. My custom ip contains my own vhdl which i assigned into my _hw.tcl file. So when generating qsys the vhdl for my component will be generated into the synthesis directory of my qsys system. However, my component also uses two quite complex megawizard generated components such as an alt_xcvr_reconfig variant and also a altera_xcvr_custom variant.In my _hw.tcl I only included the toplevel generated vhdl files for these megawizard generated files (the ones that contain all megawizard parameters). But... of course the real code is generated in special directories with a bunch of verilog and system_verilog files. Beside that the megawizard generated .qip files for both components which really describe which files belong to these ip. So... I can do two things : 1. manually add these qip files to my project 2. ignore it and generate the qsys. If I choose this option then during synthesis ofcourse the design files belonging to these components are not found. 3. I could paste the content of these qip files into the add_fileset_file lines to my _hw.tcl which becomes a mess of files... but it is possible Therefore I would like a manner to include the contents of the qip and see all files included in the add_fileset_add lines OR an option which automatically adds my two qip files which in fact are parts of my custom ip to the .qsf file. Adding the qsys to the quartus project does not solve my issue as described above. regards
Hmm, I've never even thought of adding other IP to a custom component design. Usually I just take HDL code that I want to work in a Platform Designer system and turn it into a custom component, then connect the custom component to other IP/components. I think option 3 is the only thing you can do.Is there a reason why you can't pull those IP out of your custom component and connect to them?
--- Quote Start --- Hmm, I've never even thought of adding other IP to a custom component design. Usually I just take HDL code that I want to work in a Platform Designer system and turn it into a custom component, then connect the custom component to other IP/components. I think option 3 is the only thing you can do. Is there a reason why you can't pull those IP out of your custom component and connect to them? --- Quote End --- Hi, Yes normally the way is much easier. But this time I made a quite complex component (a SATA host controller which uses a PHY and xcvr reconfig). Originally i had these two components separately in my qsys but then I came to the conclusion that my linux driver for this IP needed to control several parameters available through the management slave interfaces. Therefore I customized the whole to one IP block.... which is also a more logical approach... And I thought there would be an "advanced newbie" way to add the generated files to my custom design. Regards Henk
--- Quote Start --- Can you add them to the list on the Files tab of the Component Editor? Though I think only HDL files can be added there... --- Quote End --- Yes that is only for hdl files but also "other".. tried other before but that just copies the qip file.. nothing else and thus useless. And it provides only a graphical interface for creating the _hw.tcl file...
I'm wondering if anyone else has had success with this? I am looking at doing the same thing and it's not very intuitive when adding source files in the Component Generation GUI. The .QSYS and/or .QIP are typically the sources of truth with a list of source files + SDC, etc for a piece of IP. These are perfect to use when adding IP to Quartus project directly. But, if you add these to the fileset (via the GUI) and then select "Analyze Synthesis Files" as a sanity check, it comes back that there is a "null" file to process.
If you select the synth/[ip_name].v file, it passes the synthesis test, but I don't know how the _hw.tcl would ultimately be aware that there are sub-modules to the generated IP (FIFO) with the [ip_name]_xxxxxxx.v that are uniquely generated when building the IP in Qsys.
In this case, trying to create a _hw.tcl custom component that is instantiating a basic FIFO via IP.
Any insight into this would be fantastic! Thanks in advance.