[B]ERROR:object "std_logic_signed" is used but not declared[/B]

[Altera_Forum]

hi there, 

I'm VHDL beginner working on a Filter code, which is shown below and i'm getting the error as "error (10482): vhdl error at fir.vhd(17): object "std_logic_signed" is used but not declared" but i believe i included proper libraries , please help me solve this issue code:    library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; --use std_logic_signed.all;  use ieee.numeric_std.all; --use ieee.numeric_std_signed.all;    entity fir is     port(clk : in std_logic;  rst : in std_logic;  din : in std_logic_signed(7 downto 0);  dout : out std_logic_signed(18 downto 0));  end entity;    architecture behavioural of fir is   subtype word is std_logic_signed(7 downto 0);  type coeff_type is array(7 downto 0)of word ;  signal coeff : coeff_type := ("11110110","00011110","00110110","01001001","01001001","00110110","00011110","11110110") ;  signal count : integer ;  signal count_ref : integer;  signal prev_op : std_logic_signed(18 downto 0);  signal i: integer ;     begin    process(clk,rst)     begin    if(rising_edge(clk)) then    if(rst = '1') then  dout <= "0000000000000000000";  count <= 0;   prev_op <= "0000000000000000000";  count_ref <= 0;  elsif(rst = '0') then  if(count = count_ref) then  if(i >= 0) then   prev_op <= prev_op + (din * coeff(i));  i <= i + 1;  count <= count + 1;  count_ref <= 0;  elsif(i = 8) then  dout <= prev_op;  count <= 0;  count_ref <= 0;  i<= 0;  prev_op <= "0000000000000000000";  end if;      elsif(count /= count_ref) then  count_ref <= count_ref + 1;  end if; ---for count  end if; --- for reset  end if; --- for rising edge  end process;  end;

[Altera_Forum]

Try this: 

  library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity fir is port(clk : in std_logic; rst : in std_logic; din : in signed(7 downto 0); dout : out signed(18 downto 0)); end entity;   Cheers, Dave

[Altera_Forum]

that solved the error but i have a doubt , you removed arth.all library does my compiler understand the 8-bit signed multiplication i'm trying to perform in my code ? or is there any other library where the 8-bit signed multiplication is defined ? 

 Cheers Siva

[Altera_Forum]

--- Quote Start ---  i have a doubt, you removed arth.all library does my compiler understand the 8-bit signed multiplication i'm trying to perform in my code ? or is there any other library where the 8-bit signed multiplication is defined ?   --- Quote End ---    Looks like its in the numeric_std library:  http://www.eda.org/rassp/vhdl/models/standards/numeric_std.vhd  Simulate and test :)  Cheers, Dave

[Altera_Forum]

you cannot use std_logic_arith and numeric_std in the same file because they conflict. numeric_std is the IEEE standard package, std_logic_arith is not (so dont use it).