HI, Im using a RioRand and discovered that when I OR 2 signals either in VHDL or schematic they act like an AND gate and ANDing 2 signals acts like an OR gate. IS there a fix for this?
Sure. It's a real simple entity. Though I think I discovered how to do a work around, even though I don't understand why it works
If I NOT both button inputs before ORing them, then it works.. Otherwise it works like an AND gate
The pins that the buttons connect too have weak pull up resistors on them configured in the pin planner. Pin reads input when button is pressed grounding the pin. Cyclone II FPGA
entity invertor is
Port ( PB: in STD_LOGIC_vector(1 downto 0);
LED : out STD_LOGIC);
architecture Behavioral of invertor is
signal led_out:STD_LOGIC :='0';
--LED <= PB(0) or PB(1); this works like an AND gate. LED is lite until both buttons pressed. I ave no idea why. Works fine on a different board
-- LED <= not PB(0) or (not PB(1))); WOrks like an OR gate. LED goes off if either button is pressed
LED <=not( not PB(0) or (not PB(1))); -- This also works, Just the opposite of above. LED is off until either button is pressed
I suspect your signal inputs are setup in the schematic as active low.
The input has a pullup connected/enabled on it, so when you push the switch it grounds the line.
Thus the normal input state is high, and it goes low when you push the switch.
So that is why you need to invert the inputs before you use them, if you want normal to be '0' and switch pushed to be a '1'.
Your LEDs can be driven as either active low or active high, so you need to figure that out as well.
I use QuartusII v13.0sp1 with a Cyclone II device all the time and it works just fine.
- You can check RTL viewer to confirm gate implemented.
- Check the simulation.
- Check the board schematic for switch/led configuration(Active-LOW or Active-HIGH).
I think you are using board with Active-LOW configuration.
You don't indicate what pins your switches connect to, but based on your comment about the pullups enabled I believe they are implemented as active low, so when you push the switch the input goes to '0', normally it will be a logic '1'.
Your LED drivers on the schematic (LED1, LED2) are active low as well. So you need to drive the output to logic '0' to light the LED.
Your Led's are active low based on schematic.
Based on your post, Switch should be implemented as active low.
Which will lead you to interpret AND gate as OR gate.
Hi Anand, The input pins are pins 51 and 52 on the board for input and 143 for output to led.
How are you able to tell that by looking at the schematic? I don't see anything too me that indicates active low. Just curious for future reference. I don't see tilde's or bubles to indicate a low
I'm not using the on board push button or the onboard LEDs. Using external LED and buttons
Active low /active high configuration is used to tell under what logical condition given circuit is ON/OFF.
Example say Active-LOW button means that when you press/close the switch, then the signal sent to the FPGA will be LOW/Logic 0.
Active-LOW LED means that when we give logic '0' from FPGA than signal send to LED is to ON.
Please go through google for more information on it.