Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

CSI-2 transmitter

Honored Contributor II

Does anyone have a project with a CSI-2 transmitter? 

For example, on 10M50 eval board. 

Because no matter how hard we try, mistakes always occur: 


Error: Pin "TX_HS_CP" requires a pseudo-differential I/O assignment. 


Error: Can't place node "TX_HS_CP" -- node is a differential I/O node 


Error: Can't place differential I/O pins and/or associated SERDES transmitters or receivers -- location assignments are illegal 

Error: Pin "TX_HS_CP" with Differential 1.8-V HSTL Class I I/O standard must be driven by the external clock output of an enhanced PLL 


Need help
0 Kudos
0 Replies