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If I am using CII or SII, can I use SignalTap to debug a LVDS serializer output if the number of channels is 12 or 16?
I found this post on www.altera.com, http://www.altera.com/support/kdb/solutions/rd07042005_25.html How about for CII and SII devices? Is there bit width limitation? Many Thanks!Link Copied
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The only LVDS limitation mentioned in the SignalTap chapter of the Quartus handbook:
--- Quote Start --- Untappable Signals Not all of the post-fitting signals in your design are available in the SignalTap II: post-fitting filter in the Node Finder dialog box. The following signal types cannot be tapped: ■ ... ■ LVDS—You cannot tap the data output from a serializer/deserializer (SERDES) block. --- Quote End ---- Mark as New
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Thanks Brad!
It is really bad news for me though. :( Wonder if there are other ways to probe a serializer output other than using an oscilloscope...- Mark as New
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try post-fit simulation and DSO

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