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Can't complie a project with Signaltap II : Error (10500) & Error (12006)

Altera_Forum
Honored Contributor II
‎09-30-2014 05:27 PM
1,456 Views

Hi all, 

I'm trying to use signaltap2 but I can't compile my project. 

Here are the error codes : 

Error (10500): VHDL syntax error at sld_signaltap.vhd(35) near text "generic"; expecting "entity", or "architecture", or "use", or "library", or "package", or "configuration" 

Error (12006): Node instance "auto_signaltap_0" instantiates undefined entity "sld_signaltap" 

 

Sorry I'm very new to fpga design. 

Any tip is welcome ! :)
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Altera_Forum
Honored Contributor II
‎04-13-2017 06:26 AM
673 Views

You might encounter this known bug: 

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd06222006_508.html
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