Hi!
I have been badly struggling for 8-10 days trying to meet the timing constraints for LVDS I/O at 640Mbps. I am trying to use SERDES for LVDS data (2 lane) from 16 bit ADC (AD9563) to the FPGA (5CSXFC6D6F31C6) at 640Mbps. There is always input setup and hold violations. I have tried what all I could do. I am assuming that the 16 bit ADC is sampled at 80MSPS and hence LVDS rate on each of the 2 lanes will be 640Mbps. Also the ADC_0_DCO clock out from the ADC is exactly at the centre of the data (data window is 1.5625ns). Thus can I assume that Tco of the external device which is the ADC is 1.5625/2 (= 0.78125 ns) ? My project is very simple. I am using ALTLVDS_RX with 640Mbps data rate, 320MHz inclock, serialization factor of 8. I learnt from some forum about constraining and got hold of some example on constraining DDR inputs and the same has been implemented in my design. The constraints are as below: set input_clock ADC_0_DCO; # Name of input clock set trco_max 0.781; # Maximum clock to output delay from rising edge (external device) set trco_min 0.781; # Minimum clock to output delay from rising edge (external device) set tfco_max 0.781; # Maximum clock to output delay from falling edge (external device) set tfco_min 0.781; # Minimum clock to output delay from falling edge (external device) set trce_dly_max 0.781; # Maximum board trace delay set trce_dly_min 0.781; # Minimum board trace delay set input_ports { Datain[0] }; # List of input ports # Input Delay Constraint set_input_delay -clock $input_clock -max [expr $trco_max + $trce_dly_max] [get_ports $input_ports]; set_input_delay -clock $input_clock -min [expr $trco_min + $trce_dly_min] [get_ports $input_ports]; set_input_delay -clock $input_clock -max [expr $tfco_max + $trce_dly_max] [get_ports $input_ports] -clock_fall -add_delay; set_input_delay -clock $input_clock -min [expr $tfco_min + $trce_dly_min] [get_ports $input_ports] -clock_fall -add_delay; I have attached the files for reference. Can pl some help and meet the timing... Thanks in advance best wishes,Link Copied
For more complete information about compiler optimizations, see our Optimization Notice.