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Hi All,
Is there an easy way to trace/report, what clock drives a specific cell?
Please consider two cases:
1) the reported/traced cell is FlipFlop - this should be an easier way since the clock pin of the FlipFlop should be directly connected to the source/driving clock
2) the reported/traced cell is a leaf cell (e.g. OR or AND cell) - how can I report the clock domains of all the signals, which drive the reported/traced leaf cell?
Thank you!
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Hello,
You can use the netlist viewer to see the signals in your design.
regards,
Farabi
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You can also use the Timing Analyzer to cross-probe any path to the Chip Planner to see the path as it's routed in the device.
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Could you please explain more? Is there some video or tutorial, which explains how to check what clock domain the given signal belongs to?
Is there a TCL command or procedure, which could help in this case?
Thanks!
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still waiting to the response ...
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Hi,
Maybe you can start with watching this video tutorial on the Timing Analyzer GUI. Please finds the link: https://youtu.be/79mtPfAm1TA
Regards,
Aqid
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Hello,
Do you have any more concern regarding this?
Regards,
Aqid
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As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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