Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16606 Discussions

Connect Bus Line to another Bus Line

Altera_Forum
Honored Contributor II
2,696 Views

http://www.alteraforum.com/forum/attachment.php?attachmentid=12167&stc=1  

 

I am doing universal shift register in quartus. The situation now is I want to connect Q[0] to data1[1], Q[1] to data1[2],... and so on. Is it possible to do that?
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
1,275 Views

Yes. Correct a net to q[0] and label it data1[1].

0 Kudos
Altera_Forum
Honored Contributor II
1,275 Views

 

--- Quote Start ---  

Yes. Correct a net to q[0] and label it data1[1]. 

--- Quote End ---  

 

 

Is this what u mean? 

http://www.alteraforum.com/forum/attachment.php?attachmentid=12170&stc=1  

 

I got error for this. Error: Can't find name for bus. Q and data1 bus is impossible to have same name.
0 Kudos
Altera_Forum
Honored Contributor II
1,275 Views

 

--- Quote Start ---  

Yes. Correct a net to q[0] and label it data1[1]. 

--- Quote End ---  

 

 

Is this what u mean? 

https://www.alteraforum.com/forum/attachment.php?attachmentid=12171  

 

I got error for this. Error: Can't find name for bus. Q and data1 bus is impossible to have same name as it represent different things.
0 Kudos
Altera_Forum
Honored Contributor II
1,275 Views

Dont connect it - because you're connecting a single bit to a 5 bit bus. 

You just leave the connection disconnected and leave it to connect via named association - as you have with D0, D1 etc.
0 Kudos
Reply