Converting from GPU to FPGA

[Altera_Forum]

Hello,  

 For the past several months we have been working on converting openCL code from a GPU application to work on a Cyclone V. The problem now seems to be that I either generate millions of instructions or the logic usage is too high. I am wondering if we should abandon OpenCL and rewrite our kernel in VHDL. Our assumption is that VHDL will allow us to hand optimized the code. Does anyone have experience converting OpenCL to VHDL that can verify this assumption?

[Altera_Forum]

In a number of benchmarks, OpenCL compiler was shown to generate code comparable to hand-written HDL. 

 A simple code change or algorithm update may fix the high logic utilization. How do you know "millions of instructions" are generated? Do you expect such high logic utilization based on your code?  Can you consider sharing your kernel through a service request or FAE? Altera can take a look and make suggestions.

[Altera_Forum]

--- Quote Start ---  In a number of benchmarks, OpenCL compiler was shown to generate code comparable to hand-written HDL.  A simple code change or algorithm update may fix the high logic utilization. How do you know "millions of instructions" are generated? Do you expect such high logic utilization based on your code?  Can you consider sharing your kernel through a service request or FAE? Altera can take a look and make suggestions.  --- Quote End ---    Hi Outku,  Do you have any references on these benchmarks? I frequently encounter skepticism on the results of the OpenCL compiler compared to hand-written HDL, so it would be nice to have some documentation or examples to point to.  Thanks for any feedback on this.

[Altera_Forum]

You can find the Altera SDK for OpenCL publications here. You may find the recent gzip paper particularly interesting. 

 http://www.altera.com/products/software/opencl/opencl-index.html#publications