Creating bidirectional bus for Altera MAX CPLD

[Altera_Forum]

Hello, 

 Im working on project where I need a 8 bit bidirectional bus made of BIDIR pins.For the output direction, it's possible to use the TRI primitive, but input,the TRI cannot feed logic according to the error. What is the correct procedure of creating such a bus in the graphical design in Quartus or MAX+plus II please?  Thanks for help

[Altera_Forum]

Did you try alt_iobuf?

[Altera_Forum]

--- Quote Start ---  Did you try alt_iobuf?  --- Quote End ---    No, since I was not aware of this megafunction.But isn't this megafunction supported only by Stratix III,Stratix IV,Cyclone III devices? Im working with MAX7000 family.

[Altera_Forum]

It can be used for any bidirectional IO pin. Why don't you simply try and review the compilation result?

[Altera_Forum]

--- Quote Start ---  It can be used for any bidirectional IO pin. Why don't you simply try and review the compilation result?  --- Quote End ---    Tested, I get "Error (272006): Device family MAX7000S is invalid" during compilation.If I remove the megafunction from the design,compilation is okay.