Custom IP - Suspected Interface Problem

[road_runner]

Hello,

The following attached files describe a binary-to-hex display code custom IP peripheral for Nios II. The top-level file  was selected as the bin_hex_interface file. I included the .tcl (as a .txt as the file upload system wouldn't support it), .v, and .c main files. To test, I simply used the hello_world_small sample from Eclipse and then wrote code that passes a value to that custom IP and reads it back. So, for example, passing a value of 0 into it would return 0x40 as this is the value needed to write 0 into the hex displays. Unfortunately, though, this is all I can return back, no matter what value I try to write to it. I don't know if there is something wrong with my interface, the basic module hardware logic should in theory be fine (I tested it by itself but that doesn't mean I didn't mess up somewhere and my tests didn't catch it), or the macro I'm using, but something somewhere isn't working right.  Please let me know what I'm doing wrong. Thanks in advance!

[wwanalim_intel]

Hi,

Greetings and welcome to Intel's forum.

Please give me some time to check on this issue and will get back to you with the update.

Thank you.

Regards,

Fathulnaim

[sstrell]

When you say "this is all I can return back", are you saying that 0 is the only value that works (or works correctly)?  Or are you saying that no matter what value you put in, you always get 0x40 out?

[wwanalim_intel]

Hi,

I'm currently reviewing the attached design. Kindly grant me a bit more time to thoroughly examine it.

[wwanalim_intel]

Hi,

Where do you get the custom IP design?

[wwanalim_intel]

Hi,

Do you have any updates to share?

I would need your response to have a better understanding about the issue.

[wwanalim_intel]

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

[road_runner · Accepted solution]

I apologize. I misread the documentation. Needed BOTH Verilog files to make it work. I fixed it. It's missing the byte-addressing for the architecture.