I'm trying to use the custom configuration device programming flow editor (from convert programming files dialog) to produce the correct set of SPI commands via a JTAG .jic file with serial flash loader on a Cyclone 10 GX 10CX220Y to get the serial NOR configuration flash programmed on my board. The link to the Intel documentation for this tool is:
I'm using Quartus 21.1 Pro.
I was having little success so I hooked up a logic analyser to the SCLK, nCS, SDI, SDO lines on the flash to see what was actually being sent to the device compared to what I had defined in the flow editor. What I observed was as follows:
1) The nCS line toggles seemingly randomly between commands. This probably does no harm, but is very strange.
2) I have defined a Write Register step with the following parameters:
Name: Write CR3NV
Data: 0x00 0x00 0x00 0x04 0x08
Command-Data(bus width): 1-1
In the .xml file this is encoded as:
<data>0x00 0x00 0x00 0x04 0x08</data>
I (and the rest of the world) would expect this to produce the following sequence on the bus:
<nCS low><0x71><0x00><0x00><0x00><0x04><0x08><nCS high>
but what actually gets sent is:
<nCS low><0x71><0x00><0x00><0x00><0x04><0x08><dozens of 0x00's><nCS high>
Consequently the flash device ignores this command (indicated by the WEL bit in the status register, set by a previous command, is not cleared and the WIP bit never being set).
When will this bug be fixed?
I have filed bug report on this case. This will be fixed in future Quartus release. I can't do anything to help now, as this is Quartus internal issue. I will put this case to close for now.
internal bug report : https://hsdes.intel.com/appstore/article/#/15011385315