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DCFIFO timing warning

fedecive
Beginner
153 Views

Hi Community,

I am developing a project for the Cyclone 10 LP. The project contains a dual clock Avalon FIFO Memory defined in the Platform Designer with the following parameters:

 

 <module name="fifo_0" kind="altera_avalon_fifo" version="19.1" enabled="1">
  <parameter name="avalonMMAvalonMMDataWidth" value="32" />
  <parameter name="avalonMMAvalonSTDataWidth" value="32" />
  <parameter name="bitsPerSymbol" value="16" />
  <parameter name="channelWidth" value="8" />
  <parameter name="deviceFamilyString" value="Cyclone 10 LP" />
  <parameter name="errorWidth" value="0" />
  <parameter name="fifoDepth" value="8" />
  <parameter name="fifoInputInterfaceOptions" value="AVALONST_SINK" />
  <parameter name="fifoOutputInterfaceOptions" value="AVALONMM_READ" />
  <parameter name="showHiddenFeatures" value="false" />
  <parameter name="singleClockMode" value="false" />
  <parameter name="singleResetMode" value="false" />
  <parameter name="symbolsPerBeat" value="2" />
  <parameter name="useBackpressure" value="false" />
  <parameter name="useIRQ" value="true" />
  <parameter name="usePacket" value="true" />
  <parameter name="useReadControl" value="false" />
  <parameter name="useRegister" value="false" />
  <parameter name="useWriteControl" value="true" />
 </module>

 

 

The compilation successfully runs but the Timing Analysis returns the following warnings:

 

Warning (332182): No path is found satisfying assignment "set_max_skew -from [get_keepers {qsys_inst|fifo_0|the_dcfifo_with_controls|the_dcfifo|dual_clock_fifo|auto_generated|*rdptr_g*}] -to [get_keepers {qsys_inst|fifo_0|the_dcfifo_with_controls|the_dcfifo|dual_clock_fifo|auto_generated|ws_dgrp|dffpipe*|dffe*}] -get_skew_value_from_clock_period src_clock_period -skew_value_multiplier 0.800 ". This assignment will be ignored.
Warning (332182): No path is found satisfying assignment "set_max_skew -from [get_keepers {qsys_inst|fifo_0|the_dcfifo_with_controls|the_dcfifo|dual_clock_fifo|auto_generated|delayed_wrptr_g*}] -to [get_keepers {qsys_inst|fifo_0|the_dcfifo_with_controls|the_dcfifo|dual_clock_fifo|auto_generated|rs_dgwp|dffpipe*|dffe*}] -get_skew_value_from_clock_period src_clock_period -skew_value_multiplier 0.800 ". This assignment will be ignored.

 

 

Do you have any suggestions on how to remove these warnings?

Thank you.

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1 Reply
SyafieqS
Moderator
135 Views

Hi Federico,


I see similar issue from other forum. You can refer to link below if this could be any help

https://community.intel.com/t5/Intel-Quartus-Prime-Software/set-max-skew-constraint/td-p/130805


Thanks,

Regards


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