DDR differential pin assignments

[Altera_Forum]

I instantiated a DDR3 hard IP and compiled it. Certain pin such as MEM_CK and MEM_CKN are considered differential pairs and Quartus labeled them as "Differential 1.5V-SSTL". But instead of labeling MEM_CK+MEM_CKN as a pair, it created new pairs like MEM_CK+MEM_CK[n] in addition to MEM_CKN+MEM_CKN[n]. How do I get it to pair correctly? Just editing the names in pin planner doesn't do anything.

[Altera_Forum]

Nevermind. I figured it out. Just back-annotate in pin planner then edit the qsf by hand.

[MStof1]

I'm having the same problem.  However, I am not able to back-annotate - it's grayed out.  How do I get rid of these extra signals?  I have the signals I want connected to pins, but the pin planner doesn't consider them to be differential pairs eve though the I/O standard shows them as differential.