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DDR2 SDRAM interleving??

Altera_Forum
Honored Contributor II
‎09-04-2010 04:48 PM
1,016 Views

Hi everyone, 

 

I am using Cyclone III dev. board. I am trying to design a DDR2 SDRAM controller using SOPC builder. I need to increase the bandwidth and want to do memory interleaving, but have no idea how to do that. Is there a setting in SOPC DDR2 wizard to do interleaving, or do I have to write it myself?
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Altera_Forum
Honored Contributor II
‎05-26-2011 08:49 AM
364 Views

Hi, 

 

Could you find a way to do bank interleaving? If yes, please share as I am also struggling with it. Actually I could do it for read transfers and got a seamless consecutive read transactions on different banks. But, write transfers are with bubble of 4-5 clocks when I change the bank. 

 

Best regards.
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