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Development board questions to consult

xiaobai1
Beginner
548 Views

I posted a post in the community before, thank you very much for your reply.

After your reply to the author, the author also made further attempts on the development board, but the effect is still not ideal. The author sincerely asks you for advice. At present, the author wants to use the development board to generate a 50MHz clock pulse with a higher frequency.

In order to help you find out the problems and give pertinent suggestions, the author shows the general process of the experiment as follows.

  1. The author disassembled the LCD display on the development board and wanted to use the LCD pin as the output position of the PLL, as shown in Figure 1

xiaobai1_0-1657417880967.jpeg

 

Figure 1. LCD pin diagram of development board

  1. Call the IP core of the PLL, and burn it into the development board after successful compilation. Figure 2 shows the interface of invoking the PLL, and Figure 3 shows the result of the attempt.

xiaobai1_1-1657417880978.png

 

Figure 2. IP core diagram of invoking PLL

xiaobai1_2-1657417880995.jpeg

 

Figure 3. Experimental test results

  1. Refer to the Cyclone V (5CGTFD9E5F35) instruction of the development board. Figure 4 shows the description of LCD pins

xiaobai1_3-1657417881002.png

 

Figure 4. LCD pin information

  1. The result obtained is quite different from the expected. The oscilloscope only measured 27MHz signal, but the author set 50MHz, 25MHz and 10MHz at the output end of the PLL. Theoretically it should be possible to get three different frequency clock signals from the development board.
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Kenny_Tan
Moderator
517 Views

Hi,


Thanks for using Intel community forum,


Kindly expect some delay in the reply due to holiday.


Thanks,

Kenny


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Farabi
Employee
498 Views

Hello, 

 

May I know the previous case number? so I can know the background. 

 

regards,

Farabi

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Farabi
Employee
440 Views

Hello,


Can you share your design, we need to confirm the clock out pin. So that every changes you made to the pll output will take effect. Currently, the only output frequency coming out from the clock out pin is 27MHzy. I am afraid the location is different.


regards,

Farabi


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Farabi
Employee
418 Views

Hello,


We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


regards,

Farabi


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