- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi, all
I have some problems about simulation by third pirty tool (Mentor modelsim). I use Quartus II for synthesis. After synthesis, some LCELL is added to the design by ECO (not GUI, but original script). Then, EDA Netlist Writer writes the netlist for simulation using ModelSim, however, all I/O pins disappear in the netlist for simulation. I wrote the I/O pins by hand, however, it doesn't work. Do you have any solution?Link Copied
0 Replies
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page