Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

Error 10500

CKiel
Beginner
872 Views

Library IEEE;

USE IEEE.NUMERIC_STD.ALL;

USE IEEE.STD_LOGIC_1164.ALL;

 

ENTITY mux4 IS

PORT(

mux_in_a:IN UNSIGNED(3 downto 0);

mux_in_b :IN UNSIGNED(3 downto 0);

mux_sel :IN STD_LOGIC;

mux_out :OUT UNSIGNED(3 downto 0);

);

END mux4;

ARCHITECTURE behavior OF mux4 IS

begin

if mux_sel='0' then mux_out <= mux_in_a

elsif mux_sel='1' then mux_out <= mux_in_b

end if;

 

end architecture behavior;

 

when i run this code i get the error

Error (10500): VHDL syntax error at mux4.vhd(12) near text ")"; expecting an identifier, or "constant", or "file", or "signal", or "variable"

 

0 Kudos
2 Replies
sstrell
Honored Contributor III
167 Views

You have a semicolon (;) at the end of the mux_out port that should be removed.

KhaiChein_Y_Intel
167 Views

Library IEEE;

USE IEEE.NUMERIC_STD.ALL;

USE IEEE.STD_LOGIC_1164.ALL;

 

ENTITY mux4 IS

 

PORT(

 

mux_in_a:IN UNSIGNED(3 downto 0);

 

mux_in_b :IN UNSIGNED(3 downto 0);

 

mux_sel :IN STD_LOGIC;

 

mux_out :OUT UNSIGNED(3 downto 0)

 

);

 

END mux4;

 

ARCHITECTURE behavior OF mux4 IS

begin

 

process(mux_in_a, mux_in_b, mux_sel) begin

if mux_sel='0' then mux_out <= mux_in_a;

elsif mux_sel='1' then mux_out <= mux_in_b;

 

end if;

end process ;

 

end behavior;

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