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Error: Can't assign node "<name_pll>" to any location (ID: 176359)

Altera_Forum
Honored Contributor II
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Has anybody came across this error? After hours of searching, I can't find anything on this. 

 

I only get this error when I try to drive 8 or more register from one of the ALTPLL output. 

 

Error: Can't assign node "name_altpll:auto_generated|wire_pll1_clk[0]" to any location (ID: 176359)
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Altera_Forum
Honored Contributor II
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Hi, 

 

Can post some part of your code? 

I have tried to drive 8 registers and it was without any error. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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Altera_Forum
Honored Contributor II
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My apologies, I meant 14 registers or more. I'm trying to drive 14 register with clk27M. Here is a snippet of the code with 4 registers; there are 14 registers using this clk in total. 

 

 

PLL PLL(.inclk(clk50M), .c0(clkA), .c1(clkB), .c2(clkC), .c3(clkD), .locked(pll_lock)); 

 

reg [7:0] a = '0; 

always @ (posedge clkA) 

a = (some conditional statement) ? a + 1 : 0; 

 

reg[31:0][7:0] b = '0; 

always @ (posedge clkA)  

b[a[7:0]] = (some conditional statement) ? data : b[a[7:0]]; 

 

Thank you
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Altera_Forum
Honored Contributor II
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My apologies, I meant 14 or more registers. I'm trying to drive 14 registers from the output of the ALTPLL with 27M and input of 50M.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

My apologies, I meant 14 or more registers. I'm trying to drive 14 registers from the output of the ALTPLL with 27M and input of 50M. 

--- Quote End ---  

 

Hi, 

 

Which device you are using? 

We can drive 14 or more registers, which depends on Number of LE available on device (FPGA) 

Do check the code again. 

i have tried to reproduce the error but it was successful compilation Check the image. 

https://alteraforum.com/forum/attachment.php?attachmentid=14651&stc=1  

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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Altera_Forum
Honored Contributor II
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I'm currently using the MAX10; the model I used have one PLL. Please see attachment. 

If I comment out any one of the 14 reg I created and compile, I have a successful compilation. It only gives me an error when I leave all 14 reg in.
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Altera_Forum
Honored Contributor II
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Hi, 

 

Check the following link which may help you on the error. 

http://quartushelp.altera.com/14.1/mergedprojects/msgs/msgs/efitcc_fitcc_type_of_atom_location_assigned_mismatch.htm 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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Altera_Forum
Honored Contributor II
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Hello, 

 

I didn't modify the .qsf file manually so I don't think this applies to my current error.
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