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When i compile a project i have to see at RTL viewer a full RTL scheme, but i see only scheme of 1 project Lab2_start and i can't RTL simulate my project
1st photo, its how i have to see project, if i set a top level for my file "Lab2_start"
2nd photo its how i see
So, how compile my project, which have 2 files ( Lab2_full, Lab2_start ), but set a top level for Lab2_start and see 1st photo? ( When i set a top level to "Lab2_start" i see 2nd photo and cant start RTL simulation )
link on files: click ( Gdrive )
I hope some-one understand and help me :c
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I find solution : i slowepoke, it's work correct.
Thanks everyone who tried to help me :3
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For some reason, you have two separate projects. There should be only one project and I'm guessing "Lab2_start" should be instantiated in "Lab2_full". Add the Lab2_start.bsf to the Lab2_full.bdf schematic.
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When i open file "Lab2_full.qpf" and go to "Files" in Project navigator i see 3 files : "Lab2_start.bdf", "Lab2_full.bdf", "lpm_decode0.bdf",
and when i set as top-level for "Lab2_full.bdf", TRL-viewer work correctly ( i can double click in RTL-viewer on "lab2_start.inst"(1st photo upper ) ) but if i set as Top-level for "Lab2_start", in RTL-viewer i can see only "Lab2_start"-RTL.
IDK why, but when i set TOP-level for "Lab2_start", compilator like don't see another files(i tried delete in "Lab2_full" all bus, and 0 errors with that)
And i can create by double click on empty space my bsf schematic of "Lab2_start"
I hope u understand my explain :3
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And after when i recreate project, from 0, i copied file from 1 project where i have main scheme, to folder with comparison scheme ( where LPM_decode and Lab2_start ) when i set Top-level to 2nd file i still have this problem
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Hi,
What I understand is Lab2_full is your top bdf while Lab2_start and lpm_decode0 are the sub bdfs being added to Lab2_full. So Lab2_full should be set as top-level entity that is nothing wrong. Furthermore, RTL-viewer will only show schematic of the top-level entity so if Lab2_start is being set as top-level entity then RTL-viewer will only show the schematic of Lab2_start that is expected.
May be you can try the latest version of Quartus (RTL-viewer had been improved) which instantiated sub-modules in top-level entity can be expanded.
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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Thanks for reply, but i still have a problem : how compile project and see in Modelsim signals from LPM_decode and my project "Lab2_start".
If i set top level to bdf file "Lab2_full" i see signals just from LPM_decode, if i set top-level "Lab2_start" i see signals just from "Lab2_start" but not from LPM_decode.
I added and libraries with project, and files bdf "Lab2_start" "Lab2_full"
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I find solution : i slowepoke, it's work correct.
Thanks everyone who tried to help me :3
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