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Example for constraining Source Synchronous Interfaces in TimeQuest

Altera_Forum
Honored Contributor II
‎02-20-2007 01:38 PM
2,068 Views

Attached is a design that fully constrains a source synchronous interface using the TimeQuest timing analyzer. 

 

simply recompile the design, launch TimeQuest then run the script "Report_SS_Tester.tcl" to view results.
Constraining_Source_Synch_in_TimeQuest.qar
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Altera_Forum
Honored Contributor II
‎03-09-2007 12:32 AM
1,128 Views

Did you know there is a free online training on this topic? 

Constraining and Analyzing Timing for Source Synchronous Circuits with TimeQuest 

http://www.altera.com/training/timequest-source-synchronous
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