FIFO Controller. Help!

[Altera_Forum]

Hi! I'm having a problem implementing this: 

  A 16 level deep Circular FIFO is to be used between two asynchronous systems (Transmitting / Receiving). Implement the FIFO Controller Assuming that the FIFO is made of a 16x8 RAM array.  http://i249.photobucket.com/albums/gg240/badalandabad23/FIFOCONTROLLER.jpg   When wen is high, data can be written to the FIFO. When ren is high, data can be read from the FIFO. Writing has proirity over reading in case they occur simultaneously.  Address pointer ptr[3:0] serve as memory address line for the RAM array, while wr and rd are active high signal used to enable writing and reading respectively.   Flags:  ff = full flag, set when FIFO is full. No further writing is allowed when ff is set. Clear at reset. hf = half flag, set when FIFO has exceeed its half depth. Clear at reset. ef = emplty flag, set when FIFO is empty. Clear at reset.

[Altera_Forum]

Why don't you dual port the memory so that the FIFO can be read and written concurrently? Also have you looked at the dcfifo megafunction? It probably does exactly what you are trying to implement.

[Altera_Forum]

I'm guessing this is homework, and using ready made megafunctions is probably not allowed. 

Show us the code you wrote so far and we'll see where we can help.