Hi
I am using DSP Builder to generate a design containing a number of FIR filters. When run in ModelSim the following warning is given for each clock edge 'Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X' (es).
I have tested this with an example included with the Quartus installtion and the same warning is given.
I have attached the example model and a description of the steps to reproduce. Any advice would be much appreciated as this is an urgent problem for us.
Best regards
Simon
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Hi Simon,
Thanks for your update. For your information, I am able to replicate your warning observation using Q17.0Std + R2015a in my local PC. As I check the Modelsim simulation, seems like the simulation looks fine.
As I search through the web, I am able find the following KDB on similar error:
https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd04172014_891.html
The KDB should be applicable to SIV device as well and you may safely ignore the warning.
Please let me know if there is any concern. Thank you.
