Hi. I am using EP3C40, Q9.1sp2, SOPC and Video image processing suite.
I have a problem with the fitter. Sometimes the design goes through, sometimes it takes several fitter attempts to fit it, sometimes it fails (after several hours). I've played with the synthesis options and fitter options to see if that makes any difference.
When it fails, it complains about routing resources around a PLL that is created by a DDR2 controller used inside the SOPC builder.
I am at a loss now as to what is causing it. I guess I need some direction as to which tool I ought to use to give me visibility into the RTL design to see why it is failing at the back end.
Any suggestions?
Thanks
BobTheFish
Failure message is below:
Info: Cannot fit design in device -- retrying with increased optimization, which can result in longer processing time
Info: Failed to route the following 1 signal(s)
Info: Signal "test_sopc:test_sopc_inst|test_sopc_reset_busclockpll_c0_out_domain_synch_module:test_sopc_reset_busclockpll_c0_out_domain_synch|data_out~clkctrl"
Info: Cannot fit design in device -- following 1 routing resource(s) needed by more than one signal during the last fitting attempt
Info: Routing resource Internal Device Resource (X36_Y1, I5)
