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Generated IP cores (.qsys) files in custom ip cores _hw.tcl

FabianL
Novice
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Hello,

 

I have a custom IP core for a Platform Designer Project (Quartus Pro 24.1). The IP core also includes an official Intel FIFO IP core (from core generator)

 

The original version of the IP core was written for Platform Designer Standard edition. In standard edition the .qsys file for the Intel IP core must be added to the _hw.tcl file.

# 
# file sets
# 
add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
set_fileset_property QUARTUS_SYNTH TOP_LEVEL testmodule
set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
add_fileset_file testmodule.vhd VHDL PATH testmodule.vhd TOP_LEVEL_FILE
add_fileset_file testmodule_fifo.qsys OTHER PATH testmodule_fifo.qsys

When porting this design to Pro Edition, I am not allowed to use this line anymore:

add_fileset_file testmodule_fifo.qsys OTHER PATH testmodule_fifo.qsys

As I understand it correct, I'm supposed to manually add the Intel IP core file (testmodule_fifo.qsys) to the Quartus Project (.qsf).

Is that correct?

 

Then I end up with the custom IP core file (_hw.tcl) having no references to the generated FIFO IP core.  This seems very strange to me, as my understanding of the IP core concept in Platform Designer is, that each IP core comes with all it's requirements and thus is easy to port between different project.

If the information about used generated IP cores is now separated from the custom IP core, I cannot simply include the custom IP core in a different project.

 

Am I missing something?

Does anybody has a recommendation how to deal with this problem?

 

thanks

kind reagards

Fabian

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sstrell
Honored Contributor III
506 Views

It's not clear if you recreated and regenerated the Intel (Altera) FIFO IP when you moved the design to Pro.  I would do this first.

IP in Pro are defined using .ip files, not .qsys files, so perhaps in your _hw.tcl, you need to be referencing the .ip file created for the Pro version of the FIFO IP.

When you say "I am not allowed to use this line anymore", what error/info are you getting?

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RichardTanSY_Altera
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Yes, the platform designer standard and pro version is differ in how they handle the IP. You may checkout further details in the user guide below:

https://www.intel.com/content/www/us/en/docs/programmable/683855/current/and-differences.html

https://www.intel.com/content/www/us/en/docs/programmable/683463/22-1/upgrade-ip-cores-and-systems.html

 

As sstrell mentioned, I would recommend to upgrade all IP cores and Platform Designer systems in your project for migration to the Quartus Pro.

 

Regards,

Richard Tan

 

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RichardTanSY_Altera
408 Views

Hi,


Any update on this?


Regards,

Richard Tan


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RichardTanSY_Altera
350 Views

We noticed that we haven't received a response from you regarding the latest previous question/reply/answer, and will now transitioning your inquiry to our community support. We apologize for any inconvenience this may cause and we appreciate your understanding.

 

If you have any further questions or concerns, please don't hesitate to reach out. Please login to https://supporttickets.intel.com/s/?language=en_US, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

 

The community users will be able to help you on your follow-up questions.

 

Thank you for reaching out to us!

 

Best Regards,

Richard Tan


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